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ANSI/IEEE 1212-2001 信息技术.微处理机系统.微处理机总线的控制和状态登记(CSR)体系结构

ANSI/IEEE 1212-2001 信息技术.微处理机系统.微处理机总线的控制和状态登记(CSR)体系结构

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【英文标准名称】: Information Technology – Microprocessor Systems – Control and Status Registers (CSR) Architecture for Microcomputer Buses
【原文标准名称】: 信息技术.微处理机系统.微处理机总线的控制和状态登记(CSR)体系结构
【标准号】: ANSI/IEEE 1212-2001
【标准状态】: 现行
【国别】: 美国
【发布日期】: 2002-05-02
【实施或试行日期】:
【发布单位】: 美国国家标准学会(ANSI)
【起草单位】: IEEE
【标准类型】: ()
【标准水平】: ()
【中文主题词】: 信息技术;微处理机;建筑设计
【英文主题词】: Architectural design;Computer software;CSR architecture;Data communication;Data processing;Definition;Definitions;Information exchange;Information interchange;Information processing;Information technology;Information transfer;Interfaces (data processing);Microprocessor systems;Microprocessors;Minicomputer;Network;Network interconnection;Personal computers;Read-only memory;Sizes
【摘要】: This is a full-use standard, a revision of ISO/IEC 13213:1994; its scope reflects accumulated experience with the CSR architecture since it was first promulgated as a standard in 1991. In the intervening years, two bus standards, Scaleable Coherent Interface (SCI), IEEE Std 1596-199x, and Serial Bus, IEEE Std 1394-1995, have been the source of most practical implementation experience. The revised scope of the CSR architecture is given below: a) The overall architectural framework partitions the total available address space into equal spaces available to individual nodes. A node's address space is in turn partitioned into regions which have different usage models, e.g., memory space, private space for vendor uses, configuration ROM and an I/O space (units space) where transactions may have side effects; b) A minimal transaction set (read, write and lock requests and their associated completion responses) required for compliant bus standards. Bus bridges compliant with this architecture, whether in a homogeneous or heterogeneous environment, are also expected to transport this transaction set; c) Fundamental control and status registers (CSRs) are defined to provide a common infrastructure for all compliant buses. In some cases the details of the registers are entirely bus-dependent but the function is common to all compliant buses; d) Message request and response CSRs are specified to enable directed delivery or broadcast of messages to multiple nodes. The message format permits organizations or vendors to define the meaning of the data payload without the need for a centralized registry of all possible formats; and e) Configuration ROM provides self-descriptive data structures that permit nodes to uniformly characterize the device services available. This is critical for buses that permit live insertion and removal of nodes; each newly inserted node contains sufficient information for it to be uniquely identified and for the requisite device drivers to be loaded. Although the original CSR architecture anticipated widespread development of bridges between heterogeneous bus standards and a diversity of addressing modes, both fixed and variable, no such implementations have been made. As a consequence, the most significant changes in scope between the earlier CSR architecture and this standard are the adoption of a single, fixed addressing model and the removal of tutorial material pertaining to the design of bridges.
【中国标准分类号】: L60
【国际标准分类号】: 35_160
【页数】:
【正文语种】: 英语

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ANSIIEEE[1] 1212[1]

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